This is an automated email from the git hooks/post-receive script. It was generated because a ref change was pushed to the repository containing the project "uClibc-ng - small C library for embedded systems". The branch, master has been updated via e6faae7a3082a7a09626ce579da16d7b12fab2bf (commit) from da932d59161a2d833596be5443c81ff244d2db58 (commit) Those revisions listed above that are new to this repository have not appeared on any other notification email; so we list those revisions in full, below. - Log ----------------------------------------------------------------- commit e6faae7a3082a7a09626ce579da16d7b12fab2bf Author: Waldemar Brodkorb <wbx@uclibc-ng.org> Date: Fri Dec 26 18:43:07 2014 +0100 don't optimize for special mips cpu When building optimized code for Lemote Yeelong system, a conflict occurs. Better use optimized flags in your buildsystem, not in uClibc-ng. ----------------------------------------------------------------------- Summary of changes: Rules.mak | 8 -------- 1 file changed, 8 deletions(-) diff --git a/Rules.mak b/Rules.mak index 72e55f5..218eb1f 100644 --- a/Rules.mak +++ b/Rules.mak @@ -404,14 +404,6 @@ endif ifeq ($(TARGET_ARCH),mips) OPTIMIZATION+=-mno-split-addresses - CPU_CFLAGS-$(CONFIG_MIPS_ISA_1)+=-mips1 - CPU_CFLAGS-$(CONFIG_MIPS_ISA_2)+=-mips2 -mtune=mips2 - CPU_CFLAGS-$(CONFIG_MIPS_ISA_3)+=-mips3 -mtune=mips3 - CPU_CFLAGS-$(CONFIG_MIPS_ISA_4)+=-mips4 -mtune=mips4 - CPU_CFLAGS-$(CONFIG_MIPS_ISA_MIPS32)+=-mips32 -mtune=mips32 - CPU_CFLAGS-$(CONFIG_MIPS_ISA_MIPS32R2)+=-march=mips32r2 -mtune=mips32r2 - CPU_CFLAGS-$(CONFIG_MIPS_ISA_MIPS64)+=-mips64 -mtune=mips32 - CPU_CFLAGS-$(CONFIG_MIPS_ISA_MIPS64R2)+=-mips64r2 -mtune=mips64r2 ifeq ($(strip $(ARCH_BIG_ENDIAN)),y) CPU_LDFLAGS-$(CONFIG_MIPS_N64_ABI)+=-Wl,-melf64btsmip CPU_LDFLAGS-$(CONFIG_MIPS_O32_ABI)+=-Wl,-melf32btsmip hooks/post-receive -- uClibc-ng - small C library for embedded systems