From: Pavel Kozlov pavel.kozlov@synopsys.com
Hello,
this patch series adds base support for ARCv3 32-bit architecture, adds new machine identifer and handle changes in ISA and ARC toolchain. New ARCv3 ISA includes both 64-bit and 32-bit CPU family. This patch series adds support for 32-bit ARCv3 HS5x processors.
Sergey Matyukevich (4): arc: minor cleanup for ARCv2 ldso: arc: add compiler option check arc: add asm macros arc: add support for ARCv3 32-bit processors
include/elf.h | 3 +- ldso/ldso/Makefile.in | 3 +- ldso/ldso/arc/dl-sysdep.h | 3 ++ ldso/ldso/arc/resolve.S | 45 +++++++++++----------- libc/sysdeps/linux/arc/asm.h | 52 ++++++++++++++++++++++++++ libc/sysdeps/linux/arc/bits/syscalls.h | 4 +- libc/sysdeps/linux/arc/crt1.S | 4 +- utils/ldd.c | 7 +++- 8 files changed, 93 insertions(+), 28 deletions(-) create mode 100644 libc/sysdeps/linux/arc/asm.h
base-commit: d46709504efa46e5b9b52739a48ab61b39fd4971
From: Sergey Matyukevich sergey.matyukevich@synopsys.com
Add missing ARCv2 check in MATCH_MACHINE macro. Update comment for EM_ARCV2 define.
Signed-off-by: Sergey Matyukevich sergey.matyukevich@synopsys.com Signed-off-by: Pavel Kozlov pavel.kozlov@synopsys.com --- include/elf.h | 2 +- utils/ldd.c | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-)
diff --git a/include/elf.h b/include/elf.h index 7d66d70a43ac..018ff1550dae 100644 --- a/include/elf.h +++ b/include/elf.h @@ -270,7 +270,7 @@ typedef struct #define EM_METAG 174 /* Imagination Technologies Meta */ #define EM_AARCH64 183 /* ARM AARCH64 */ #define EM_MICROBLAZE 189 /* Xilinx Microblaze */ -#define EM_ARCV2 195 /* ARCv2 Cores */ +#define EM_ARCV2 195 /* Synopsys ARCv2 Cores */ #define EM_RISCV 243 /* RISC-V */ #define EM_CSKY 252 /* C-SKY Cores */ #define EM_KVX 256 /* Kalray VLIW core of the MPPA processor family */ diff --git a/utils/ldd.c b/utils/ldd.c index dfc4ee9a5431..3accd78391d7 100644 --- a/utils/ldd.c +++ b/utils/ldd.c @@ -30,7 +30,7 @@ #endif
#if defined(__arc__) -#define MATCH_MACHINE(x) (x == EM_ARCOMPACT) +#define MATCH_MACHINE(x) (x == EM_ARCOMPACT || x == EM_ARCV2) #define ELFCLASSM ELFCLASS32 #endif
From: Sergey Matyukevich sergey.matyukevich@synopsys.com
Option '-mno-long-calls' is not supported by all arc gcc compilers. For instance, this option is not supported by GCC for ARCv3 processors. Check if this option is supported before applying it.
Signed-off-by: Sergey Matyukevich sergey.matyukevich@synopsys.com Signed-off-by: Pavel Kozlov pavel.kozlov@synopsys.com --- ldso/ldso/Makefile.in | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/ldso/ldso/Makefile.in b/ldso/ldso/Makefile.in index 4f2a184545f0..2d3886d735da 100644 --- a/ldso/ldso/Makefile.in +++ b/ldso/ldso/Makefile.in @@ -38,7 +38,8 @@ CFLAGS-ldso.c += -DLDSO_MULTILIB_DIR="$(MULTILIB_DIR)" endif
ifeq ($(TARGET_ARCH),arc) -CFLAGS-ldso.c += -mno-long-calls +$(eval $(call check-gcc-var,-mno-long-calls)) +CFLAGS-ldso.c += $(CFLAGS_-mno-long-calls) endif
LDFLAGS-$(UCLIBC_FORMAT_DSBT_ELF)-$(UCLIBC_LDSO_NAME).so := -Wl,--dsbt-index=1
From: Sergey Matyukevich sergey.matyukevich@synopsys.com
Add a header file with assembler macros to be able to handle in one place the differences between ARCv2 and ARCv3 ISAs. It is a preparatory step before the introduction of support for ARCv3 CPUs.
Signed-off-by: Sergey Matyukevich sergey.matyukevich@synopsys.com Signed-off-by: Pavel Kozlov pavel.kozlov@synopsys.com --- ldso/ldso/arc/resolve.S | 45 ++++++++++++++++++------------------ libc/sysdeps/linux/arc/asm.h | 28 ++++++++++++++++++++++ 2 files changed, 51 insertions(+), 22 deletions(-) create mode 100644 libc/sysdeps/linux/arc/asm.h
diff --git a/ldso/ldso/arc/resolve.S b/ldso/ldso/arc/resolve.S index 891f66b97008..2b66c69cb5db 100644 --- a/ldso/ldso/arc/resolve.S +++ b/ldso/ldso/arc/resolve.S @@ -4,6 +4,7 @@ * Licensed under the LGPL v2.1 or later, see the file COPYING.LIB in this tarball. */
+#include <asm.h> #include <sysdep.h> #include <sys/syscall.h>
@@ -12,30 +13,30 @@ ; r10-r12 are already clobbered by PLTn, PLT0 thus neednot be saved
.macro SAVE_CALLER_SAVED - push_s r0 - push_s r1 - push_s r2 - push_s r3 - st.a r4, [sp, -4] - st.a r5, [sp, -4] - st.a r6, [sp, -4] - st.a r7, [sp, -4] - st.a r8, [sp, -4] - st.a r9, [sp, -4] - push_s blink + PUSHR_S r0 + PUSHR_S r1 + PUSHR_S r2 + PUSHR_S r3 + PUSHR r4 + PUSHR r5 + PUSHR r6 + PUSHR r7 + PUSHR r8 + PUSHR r9 + PUSHR_S blink .endm
.macro RESTORE_CALLER_SAVED_BUT_R0 - ld.ab blink,[sp, 4] - ld.ab r9, [sp, 4] - ld.ab r8, [sp, 4] - ld.ab r7, [sp, 4] - ld.ab r6, [sp, 4] - ld.ab r5, [sp, 4] - ld.ab r4, [sp, 4] - pop_s r3 - pop_s r2 - pop_s r1 + POPR blink + POPR r9 + POPR r8 + POPR r7 + POPR r6 + POPR r5 + POPR r4 + POPR_S r3 + POPR_S r2 + POPR_S r1 .endm
; Upon entry, PLTn, which led us here, sets up the following regs @@ -53,5 +54,5 @@ ENTRY(_dl_linux_resolve)
RESTORE_CALLER_SAVED_BUT_R0 j_s.d [r0] ; r0 has resolved function addr - pop_s r0 ; restore first arg to resolved call + POPR_S r0 ; restore first arg to resolved call END(_dl_linux_resolve) diff --git a/libc/sysdeps/linux/arc/asm.h b/libc/sysdeps/linux/arc/asm.h new file mode 100644 index 000000000000..f98eb239fe15 --- /dev/null +++ b/libc/sysdeps/linux/arc/asm.h @@ -0,0 +1,28 @@ +/* + * Copyright (C) 2022, Synopsys, Inc. (www.synopsys.com) + * + * Licensed under the LGPL v2.1 or later, see the file COPYING.LIB in this tarball. + */ + +#ifndef _ARC_ASM_H +#define _ARC_ASM_H + + +.macro PUSHR reg + push \reg +.endm + +.macro PUSHR_S reg + push_s \reg +.endm + +.macro POPR reg + pop \reg +.endm + +.macro POPR_S reg + pop_s \reg +.endm + + +#endif /* _ARC_ASM_H */
From: Sergey Matyukevich sergey.matyukevich@synopsys.com
New ARCv3 ISA includes both 64-bit and 32-bit CPU family. This patch adds support for 32-bit ARCv3 HS5x processors.
Signed-off-by: Sergey Matyukevich sergey.matyukevich@synopsys.com Signed-off-by: Pavel Kozlov pavel.kozlov@synopsys.com --- include/elf.h | 1 + ldso/ldso/arc/dl-sysdep.h | 3 +++ libc/sysdeps/linux/arc/asm.h | 24 ++++++++++++++++++++++++ libc/sysdeps/linux/arc/bits/syscalls.h | 4 ++-- libc/sysdeps/linux/arc/crt1.S | 4 +++- utils/ldd.c | 5 +++++ 6 files changed, 38 insertions(+), 3 deletions(-)
diff --git a/include/elf.h b/include/elf.h index 018ff1550dae..b7edbade2e46 100644 --- a/include/elf.h +++ b/include/elf.h @@ -273,6 +273,7 @@ typedef struct #define EM_ARCV2 195 /* Synopsys ARCv2 Cores */ #define EM_RISCV 243 /* RISC-V */ #define EM_CSKY 252 /* C-SKY Cores */ +#define EM_ARCV3_32 255 /* Synopsys ARCv3 32-bit Cores */ #define EM_KVX 256 /* Kalray VLIW core of the MPPA processor family */
/* NEXT FREE NUMBER: Increment this after adding your official arch number */ diff --git a/ldso/ldso/arc/dl-sysdep.h b/ldso/ldso/arc/dl-sysdep.h index ed8b37205cc4..c8915511a761 100644 --- a/ldso/ldso/arc/dl-sysdep.h +++ b/ldso/ldso/arc/dl-sysdep.h @@ -75,6 +75,9 @@ do { \ #elif defined(__HS__) #define MAGIC1 EM_ARCV2 #define ELF_TARGET "ARCv2" /* For error messages */ +#elif defined(__ARC64_ARCH32__) +#define MAGIC1 EM_ARCV3_32 +#define ELF_TARGET "ARCv3_32" /* For error messages */ #endif
#undef MAGIC2 diff --git a/libc/sysdeps/linux/arc/asm.h b/libc/sysdeps/linux/arc/asm.h index f98eb239fe15..f15dff841aec 100644 --- a/libc/sysdeps/linux/arc/asm.h +++ b/libc/sysdeps/linux/arc/asm.h @@ -7,6 +7,29 @@ #ifndef _ARC_ASM_H #define _ARC_ASM_H
+#if defined (__ARC64_ARCH32__) + +.macro PUSHR reg + push \reg +.endm + +.macro PUSHR_S reg + push \reg +.endm + +.macro POPR reg + pop \reg +.endm + +.macro POPR_S reg + pop \reg +.endm + +#elif defined (__ARC64_ARCH64__) + +# error ARCv3 64-bit is not supported by uClibc-ng + +#else /* ARCHS || ARC700 */
.macro PUSHR reg push \reg @@ -24,5 +47,6 @@ pop_s \reg .endm
+#endif
#endif /* _ARC_ASM_H */ diff --git a/libc/sysdeps/linux/arc/bits/syscalls.h b/libc/sysdeps/linux/arc/bits/syscalls.h index c858d788be8c..000b6b6310b1 100644 --- a/libc/sysdeps/linux/arc/bits/syscalls.h +++ b/libc/sysdeps/linux/arc/bits/syscalls.h @@ -100,7 +100,7 @@ extern long __syscall_error (int);
#ifdef __A7__ #define ARC_TRAP_INSN "trap0 \n\t" -#elif defined(__HS__) +#else #define ARC_TRAP_INSN "trap_s 0 \n\t" #endif
@@ -182,7 +182,7 @@ extern long __syscall_error (int);
#ifdef __A7__ #define ARC_TRAP_INSN trap0 -#elif defined(__HS__) +#else #define ARC_TRAP_INSN trap_s 0 #endif
diff --git a/libc/sysdeps/linux/arc/crt1.S b/libc/sysdeps/linux/arc/crt1.S index 70a06e058d3b..ff36d252e9d7 100644 --- a/libc/sysdeps/linux/arc/crt1.S +++ b/libc/sysdeps/linux/arc/crt1.S @@ -40,7 +40,9 @@ __start: ld_s r1, [sp] ; argc
mov_s r5, r0 ; rltd_fini - add_s r2, sp, 4 ; argv + /* Use the universal 32-bit add instruction as 16-bit add_s was excluded from + ARCv3 ISA */ + add r2, sp, 4 ; argv #ifdef L_Scrt1 ld r0, [pcl, @main@gotpc] ld r3, [pcl, @_init@gotpc] diff --git a/utils/ldd.c b/utils/ldd.c index 3accd78391d7..46cd97170433 100644 --- a/utils/ldd.c +++ b/utils/ldd.c @@ -34,6 +34,11 @@ #define ELFCLASSM ELFCLASS32 #endif
+#if defined(__ARC64_ARCH32__) +#define MATCH_MACHINE(x) (x == EM_ARCV3_32) +#define ELFCLASSM ELFCLASS32 +#endif + #if defined(__arm__) || defined(__thumb__) #define MATCH_MACHINE(x) (x == EM_ARM) #define ELFCLASSM ELFCLASS32
Hi Pavel,
thanks applied and pushed, best regards Waldemar
Pavel.Kozlov@synopsys.com wrote,
From: Pavel Kozlov pavel.kozlov@synopsys.com
Hello,
this patch series adds base support for ARCv3 32-bit architecture, adds new machine identifer and handle changes in ISA and ARC toolchain. New ARCv3 ISA includes both 64-bit and 32-bit CPU family. This patch series adds support for 32-bit ARCv3 HS5x processors.
Sergey Matyukevich (4): arc: minor cleanup for ARCv2 ldso: arc: add compiler option check arc: add asm macros arc: add support for ARCv3 32-bit processors
include/elf.h | 3 +- ldso/ldso/Makefile.in | 3 +- ldso/ldso/arc/dl-sysdep.h | 3 ++ ldso/ldso/arc/resolve.S | 45 +++++++++++----------- libc/sysdeps/linux/arc/asm.h | 52 ++++++++++++++++++++++++++ libc/sysdeps/linux/arc/bits/syscalls.h | 4 +- libc/sysdeps/linux/arc/crt1.S | 4 +- utils/ldd.c | 7 +++- 8 files changed, 93 insertions(+), 28 deletions(-) create mode 100644 libc/sysdeps/linux/arc/asm.h
base-commit: d46709504efa46e5b9b52739a48ab61b39fd4971
2.25.1
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Pavel.Kozlov＠synopsys.com -
Waldemar Brodkorb